Design of Clocked SR and Clocked D Flip Flops using CNTFET Logic Gates

Abstract

: The main objective of this paper is to develop a compact model for MOSFET like CNTFET with fabrication feasibility. The physical structure of CNTFET is very similar to that of MOSFETs and their I-V characteristics and transfer characteristics are also very promising and they suggest that CNTFETs have the potential to be a successful replacement of MOSFETs in nanoscale electronics. The modeled CNTFET has been used to design logic gates which shows superior performance over MOSFET based logic gates. The various clocked flip flop circuits have been designed using CNTFET logic gates and simulated using Hspice. The use of CNTFET logic gates for designing flip flop circuits can reduce the power consumption and size.