FPGA BASED SINGLE-PHASE CASCADED MULTILEVEL VOLTAGE SOURCE INVERTER FED ASD APPLICATIONS

Abstract

This paper presents Field Programmable Gate Array (FPGA) based Sinusoidal Pulse Width Modulation (SPWM) controller for single-phase cascaded multilevel inverter fed Adjustable Speed Drive (ASD) applications. The cascaded inverter is constructed using three conventional full H-bridges for a seven-level output that reduces the harmonic content. PWM Voltage Source Inverter (VSI) should maintain the variation of both voltages and frequency simultaneously and keep their ratio constant for the control of speed. In this investigation, a simple SPWM control circuit is adopted using FPGA device. It can be accommodated in a single chip that provides high computation speed and accurate control signals for higher output voltages and currents with less harmonics. VHDL language is used to model the inverter switching strategies. The proposed controller generates 12-control switching signals that cascaded multilevel inverter for 7- level output voltage. Matlab/System generator and ISE/XILINX tools are used with hardware-co-simulation to synthesize the digital-control architecture and the obtained architecture is embedded in FPGA.