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Now a days most of the processors are high performance RISC processors .This paper introduces a novel code compression approach for embedded RISC processor, which reduces the code size and improves the compression ratio. Code compression is the technique to reduce the program size using various code compression algorithms to original instruction sets. There are two methods of compression is used in this paper. One is Dictionary based and the other is statistical compression. Our implementation is assessed through various benchmarking performed on embedded programs. In this approach, an efficient code compression is achieved using lookup table and Canonical Huffman decoder.