Comparison and Mitigation of Harmonics Using Different Optimization Techniques for SHE-PWM of Single-Phase Novel Symmetrical Multilevel Inverter

Abstract

This paper suggests a novel configuration symmetrical single phase multilevel inverter topology which imposes a minimum count of switches and driver circuits while contrasted with conservative multilevel inverter topologies. A nine level single phase output voltage is engendered using eight switches. The proposed topology can be able to elongate effortlessly to obtain ‘n’ levels in the output voltage. The simulation result of nine level multilevel inverter is obtained from MATLAB®Simulink. The desired output voltage is obtained by mitigating low order harmonics offered by Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM). Distinct optimization techniques such as Particle Swarm Optimization (PSO), Bee Colony Optimization (BCO) and Ant colony optimization (ACO) are adopted for the proposed inverter. On comparing the optimization techniques, Ant colony optimization mitigates the 5th and 7th order harmonics to a great extent. Conclusively, the framework is done which validate the opportune experimental result with simulated response.