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M Senthil Kumar
PS Manoharan

Abstract

The recent increase in non-linear loads has developed its major impact in harmonics mitigation and voltage gain improvement. Wherever, conventional cascaded multilevel inverter (CMI) has its buck operation and complexity while that switching leads to further loss. This complexity can be minimized by developing a topology with the combination of quasi Z-source cascaded multilevel inverter (QZS-CMI) which can combine its benefit to boost up voltage in single stage and generate high-quality output voltage waveform with improved reliability. This is done by combination of step modulation and selective harmonic elimination (SHE) PWM. This technique has its own advantage in reducing the switching frequency and complexity of the system. This technique is applied for the different levels in QZS-CMI with respect to voltage gain improvement and reduction of total harmonic distortion (THD) to the IEEE Standard 519. To validate the simulation results this technique is implemented in hardware model of 450W/150V inverter with ARM-processor.

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