PHOTOVOLTAIC BASED NEW MULTILEVEL INVERTER TOPOLOGY WITH MINIMUM NUMBER OF SWITCHING COMPONENTS
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Aug 21, 2018
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Abstract
Multilevel inverter (MLI) plays a strong role in low power photovoltaic (PV) applications to transfer large amount of high quality power. It offers less distortion and can be used in high power, medium voltage applications. The objective of this paper is to propose a photovoltaic based new multilevel inverter topology with reduced number of switches and voltage sources. The proposed inverter consists of two units namely basic unit which produces unidirectional output voltage and polarity changing unit which helps to change the polarity of the output voltage. The basic unit of the proposed inverter topology produces five level output voltage waveform during symmetric operation and nine level output voltage waveform during asymmetric operation. This topology can be extended with multiple dc sources to synthesize large output levels. The advantage of this topology is it uses minimum number of components and hence the cost and size of the inverter is reduced. In this paper, the dc source for the proposed inverter topology is modelled as a PV array. A mathematical model for the PV array is developed and implemented with the proposed multilevel inverter topology. The proposed inverter is simulated using MATLAB/Simulink software. The simulation results for different output levels are analysed and presented.
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[13] Venkatraman, T. and Periasamy, S., Analysis of Multicarrier PWM techniques for Photovoltaic fed Cascaded H-Bridge Multilevel Inverter, Journal of Electrical & Electronics Engineering, Vol. 10 Issue 1, p85-90, May 2017
[14] Odeh, C.I., Obe, E.S. and Ojo, O, Topology for cascaded multilevel inverter, IET Power Electronics, Vol. 9, No. 5, pp. 921-929, 4 20 2016.
[15] Lee, S.S., Sidorov, M., Lim, C.S., Idris, N.R.N. and Heng, Y.E, Hybrid Cascaded Multilevel Inverter (HCMLI) with Improved Symmetrical 4-Level Submodule, IEEE Transactions on Power Electronics, vol. 33, no. 2, pp. 932-935, Feb. 2018.
[16] Babaei, E., Laali, S. and Alilu, S, Cascaded Multilevel Inverter With Series Connection of Novel H-Bridge Basic Units, IEEE Transactions on Industrial Electronics, Vol. 61, No. 12, pp. 6664-6671, Dec. 2014
[17] Samadaei, E., Sheikholeslami, A., Gholamian, S.A. and Adabi, J, A Square T-Type (ST-Type) Module for Asymmetrical Multilevel Inverters, IEEE Transactions on Power Electronics, Vol. 33, No. 2, pp. 987-996, Feb. 2018
[18] Prabaharan, N. and Palanisamy, K, Analysis of cascaded H-bridge multilevel inverter configuration with double level circuit. , IET Power Electronics, Vol. 10, No. 9, pp. 1023-1033, 7 28 2017.
[19] Gupta, K.K. and Jain, S, Topology for multilevel inverters to attain maximum number of levels from given DC sources, IET Power Electronics, Vol. 5, No. 4, pp. 435-446, April 2012.
[20] Hota, A., Jain, S. and Agarwal, V, An Optimized Three-Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part, IEEE Transactions on Power Electronics, Vol. 32, No. 10, pp. 7414-7418, Oct. 2017
[21] Samadaei, E., Gholamian, S.A., Sheikholeslami, A. and Adabi, J, An Envelope Type (E-Type) Module: Asymmetric Multilevel Inverters With Reduced Components, IEEE Transactions on Industrial Electronics. Vol. 63, No. 11, pp. 7148-7156, Nov. 2016
[22] Venkatraman, T. and Periasamy, S, Venkatraman, T. and Periasamy, S, Acta Polytechnica Hungarica, Vol. 15, No. 2, pp. 141-67, 2018.
[2] Farakhor, R., Reza Ahrabi, H., Ardi and Najafi Ravadanegh, S., Symmetric and asymmetric transformer based cascaded multilevel inverter with minimum number of components. , IET Power Electronics, Vol. 8, No. 6, pp. 1052-1060, 2015
[3] Du, Z., Tolbert, L.M., Ozpineci, B. and Chiasson, J.N, Fundamental frequency switching strategies of a seven-level hybrid cascaded H-bridge multilevel inverter, IEEE Transactions on Power Electronics, Vol. 24, No. 1, pp. 25–33, 2009.
[4] Corzine, K.A. and Familiant, Y.L, A new cascaded multilevel H-bridge drive, : IEEE Transactions on Power Electronics, Vol. 17, pp. 125–131, 2002
[5] Thiyagarajan, V. and Somasundaram, P, Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components., Computer Modeling in Engineering & Sciences, Vol. 113, No. 4, pp. 461-473, 2017.
[6] Banaei, M.R. and Salary, E, New multilevel inverter with reduction of switches and gate driver, Energy Conversion and Management, Vol. 52, pp. 1129–1136, 2011
[7] Nabae, A., Takahashi, I. and Akagi, H, A new neutral-point-clamped PWM inverter., IEEE Transactions on Industry Applications, Vol. 17, No. 5, pp. 518–523, 2011.
[8] Busquets-Monge, S., Rocabert, J., Rodriguez, P., Alepuz, S. and Bordonau, J.: , Multilevel Diode-Clamped Converter for Photovoltaic Generators with Independent Voltage Control of Each Solar Array, IEEE Transactions on Industrial Electronics, Vol. 55, No. 7, pp. 2713-2723, 2008.
[9] Rodriguez, J., Lai, J.S. and Peng, F.Z., Multilevel inverter: A survey of topologies, controls, and applications, IEEE Transactions on Industrial Electronics, Vol. 49, No. 4, pp. 724–738, 2002.
[10] Rahim, N.A. and Selvaraj, J, Multistring five-level inverter with novel PWM control scheme for PV application, IEEE Transactions on Industrial Electronics, Vol. 57, No. 6, pp. 2111–2123, 2010
[11] Patel, H. and Agarwal, V, MATLAB-based modeling to study the effects of partial shading on PV array characteristics, IEEE Transactions on Energy Conversion, Vol. 23, No. 1, pp. 302–310, 2008.
[12] Gow, J. A. and Manning, C.D, Development of a photovoltaic array model for use in power-electronics simulation studies. , IEE Proceeding Electric Power Applications, Vol. 146, No. 2, pp. 193–200, 1999
[13] Venkatraman, T. and Periasamy, S., Analysis of Multicarrier PWM techniques for Photovoltaic fed Cascaded H-Bridge Multilevel Inverter, Journal of Electrical & Electronics Engineering, Vol. 10 Issue 1, p85-90, May 2017
[14] Odeh, C.I., Obe, E.S. and Ojo, O, Topology for cascaded multilevel inverter, IET Power Electronics, Vol. 9, No. 5, pp. 921-929, 4 20 2016.
[15] Lee, S.S., Sidorov, M., Lim, C.S., Idris, N.R.N. and Heng, Y.E, Hybrid Cascaded Multilevel Inverter (HCMLI) with Improved Symmetrical 4-Level Submodule, IEEE Transactions on Power Electronics, vol. 33, no. 2, pp. 932-935, Feb. 2018.
[16] Babaei, E., Laali, S. and Alilu, S, Cascaded Multilevel Inverter With Series Connection of Novel H-Bridge Basic Units, IEEE Transactions on Industrial Electronics, Vol. 61, No. 12, pp. 6664-6671, Dec. 2014
[17] Samadaei, E., Sheikholeslami, A., Gholamian, S.A. and Adabi, J, A Square T-Type (ST-Type) Module for Asymmetrical Multilevel Inverters, IEEE Transactions on Power Electronics, Vol. 33, No. 2, pp. 987-996, Feb. 2018
[18] Prabaharan, N. and Palanisamy, K, Analysis of cascaded H-bridge multilevel inverter configuration with double level circuit. , IET Power Electronics, Vol. 10, No. 9, pp. 1023-1033, 7 28 2017.
[19] Gupta, K.K. and Jain, S, Topology for multilevel inverters to attain maximum number of levels from given DC sources, IET Power Electronics, Vol. 5, No. 4, pp. 435-446, April 2012.
[20] Hota, A., Jain, S. and Agarwal, V, An Optimized Three-Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part, IEEE Transactions on Power Electronics, Vol. 32, No. 10, pp. 7414-7418, Oct. 2017
[21] Samadaei, E., Gholamian, S.A., Sheikholeslami, A. and Adabi, J, An Envelope Type (E-Type) Module: Asymmetric Multilevel Inverters With Reduced Components, IEEE Transactions on Industrial Electronics. Vol. 63, No. 11, pp. 7148-7156, Nov. 2016
[22] Venkatraman, T. and Periasamy, S, Venkatraman, T. and Periasamy, S, Acta Polytechnica Hungarica, Vol. 15, No. 2, pp. 141-67, 2018.