Cascaded Multilevel Inverter Topology with Reduced Number of Switches and Sources Arranged in Matrix Structure

Abstract

This paper analysis an improved topology of a cascaded multilevel inverter (CMLI) that utilizes less switch count topological structure than that of conventional topology. So with the reduced number of switch count topological structures is designed in the mould of a matrix for a cascaded multilevel inverter. As the numbers of switches are depleted in the conduction path, so both conduction and switching losses are reduced, lower input current distortion and electromagnetic interference are also reduced. Therefore it assists to increase the efficiency of the converter. The propound inverter focus extends the outstretch to produces different number of output voltage levels from the congruent topology, where it uses the same number of the voltage source and reduced number of switches compared to the conventional inverters. Thus the desired operation of the power modules and firing pulses are generated by the annex pulse width modulation (PWM) techniques strategy. And its effect on the harmonic spectrum will be analyzed. The converter will be modeled with the help of MATLAB/SIMULINK.